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| author | Karol Kolacinski <karol.kolacinski@intel.com> | 2025-06-23 17:30:00 -0700 |
|---|---|---|
| committer | Tony Nguyen <anthony.l.nguyen@intel.com> | 2025-06-26 08:37:00 -0700 |
| commit | 5755b4c023dbfc0856087f005ddf437f341c3c45 (patch) | |
| tree | 76b334a39ac74dc2a0a16fc472a5c9ea8210d450 /scripts/generate_rust_analyzer.py | |
| parent | c6b4486a62013460e1dc78abe936560aad27f977 (diff) | |
ice: add multiple TSPLL helpers
Add helpers for checking TSPLL params, disabling sticky bits,
configuring TSPLL and getting default clock frequency to simplify
the code flows.
Reviewed-by: Milena Olech <milena.olech@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions