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authorJessica Zhang <jessica.zhang@oss.qualcomm.com>2025-05-06 18:38:39 -0700
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>2025-08-29 01:51:46 +0300
commit62b7d68352881609e237b303fa391410ebc583a5 (patch)
treeda0b03c43cf826851b8c12f38b7443e12864c9f7 /scripts/generate_rust_analyzer.py
parent12c3c6c44d1b0fd17f18522089b12ad269769c00 (diff)
drm/msm/dpu: Filter modes based on adjusted mode clock
Filter out modes that have a clock rate greater than the max core clock rate when adjusted for the perf clock factor This is especially important for chipsets such as QCS615 that have lower limits for the MDP max core clock. Since the core CRTC clock is at least the mode clock (adjusted for the perf clock factor) [1], the modes supported by the driver should be less than the max core clock rate. [1] https://elixir.bootlin.com/linux/v6.12.4/source/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c#L83 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/652041/ Link: https://lore.kernel.org/r/20250506-filter-modes-v2-1-c20a0b7aa241@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
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