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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-02-25 17:02:52 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-03-06 10:31:11 +0100 |
| commit | 704121ff1f6e05bd00ecb1ef2918ac309c18eb45 (patch) | |
| tree | 7974f8fc5415b5d49391f5e1629ae9280f900e6c /scripts/generate_rust_analyzer.py | |
| parent | 74cbc0e6b2051a604c9bec8c825d83832def0462 (diff) | |
ARM: dts: exynos: add ports to TC358764 bridge on Arndale
The Toshiba TC358764 bridge binding expect up two ports as it is a
bridge, thus add ports property to encapsulate them.
Link: https://lore.kernel.org/r/20230225160252.18737-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions