diff options
| author | Shuicheng Lin <shuicheng.lin@intel.com> | 2025-05-13 15:30:10 +0000 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2025-05-22 20:49:55 -0700 |
| commit | 84b6f8503b29a6cc5a82848253a97c09a95fdf49 (patch) | |
| tree | ea053ea5d9e8b71ef59a28683adfdcaadff0e8d6 /scripts/generate_rust_analyzer.py | |
| parent | 57b34cba8ec01e22d2f3628ffa979e0cb9169238 (diff) | |
drm/xe: Use xe_mmio_read32() to read mtcfg register
The mtcfg register is a 32-bit register and should therefore be
accessed using xe_mmio_read32().
Other 3 changes per codestyle suggestion:
"
xe_mmio.c:83: CHECK: Alignment should match open parenthesis
xe_mmio.c:131: CHECK: Comparison to NULL could be written "!xe->mmio.regs"
xe_mmio.c:315: CHECK: line length of 103 exceeds 100 columns
"
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
Link: https://lore.kernel.org/r/20250513153010.3464767-1-shuicheng.lin@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
(cherry picked from commit d2662cf8f44a68deb6c76ad9f1d9f29dbf7ba601)
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions