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| author | Arnd Bergmann <arnd@arndb.de> | 2025-01-16 14:45:44 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-01-16 14:45:44 +0100 |
| commit | c50a3355719189c155044fb895971a3c86963735 (patch) | |
| tree | 1cb1951eda0352c0bd9869cb3352f34eaad16130 /scripts/generate_rust_analyzer.py | |
| parent | 608e9fe27fa3f7d66d38e123a3307ef9f600bb6f (diff) | |
| parent | c357e2295b7880b1d9d365c3389f06ef2eb464d0 (diff) | |
Merge tag 'renesas-dts-for-v6.14-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.14 (take two)
- Add pin control support for the RZ/G3E SoC and the RZ/G3E SMARC
Carrier-II EVK development board,
- Add Image Signal Processor helper block (FCPVX and VSPX) support for
the R-Car V4H SoC,
- Describe odd C-PHY wiring on the White Hawk CSI/DSI sub-board,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.14-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: white-hawk-csi-dsi: Define CSI-2 data line orders
arm64: dts: renesas: r8a779g0: Add VSPX instances
arm64: dts: renesas: r8a779g0: Add FCPVX instances
arm64: dts: renesas: r9a09g047e57-smarc: Add SCIF pincontrol
arm64: dts: renesas: r9a09g047: Add pincontrol node
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Replace RZG2L macros
dt-bindings: pinctrl: renesas: Document RZ/G3E SoC
dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H
Link: https://lore.kernel.org/r/cover.1736180859.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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