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authorBenjamin Tissoires <bentiss@kernel.org>2024-07-16 12:19:28 +0200
committerBenjamin Tissoires <bentiss@kernel.org>2024-07-16 12:19:28 +0200
commit3c69140734a27f8b145f12fa0ae80c1fe36a02ca (patch)
treead36bf7e6a5400212fbf917eceb4c7ad4df5d557 /scripts/generate_rust_target.rs
parent5ba28be6be8ac6cd4fa1ac67cd4da237d39917d2 (diff)
parent8a25418ba65a5d2494b369f6178a284c449bc399 (diff)
Merge branch 'for-6.11/trivial' into for-linus
Couple of trivial fixes: - extra semicolon (Chen Ni) - typo (Thorsten Blum)
Diffstat (limited to 'scripts/generate_rust_target.rs')
-rw-r--r--scripts/generate_rust_target.rs13
1 files changed, 7 insertions, 6 deletions
diff --git a/scripts/generate_rust_target.rs b/scripts/generate_rust_target.rs
index 3fcbc3737b2e..641b713a033a 100644
--- a/scripts/generate_rust_target.rs
+++ b/scripts/generate_rust_target.rs
@@ -150,6 +150,12 @@ fn main() {
// `llvm-target`s are taken from `scripts/Makefile.clang`.
if cfg.has("ARM64") {
panic!("arm64 uses the builtin rustc aarch64-unknown-none target");
+ } else if cfg.has("RISCV") {
+ if cfg.has("64BIT") {
+ panic!("64-bit RISC-V uses the builtin rustc riscv64-unknown-none-elf target");
+ } else {
+ panic!("32-bit RISC-V is an unsupported architecture");
+ }
} else if cfg.has("X86_64") {
ts.push("arch", "x86_64");
ts.push(
@@ -164,12 +170,7 @@ fn main() {
ts.push("llvm-target", "x86_64-linux-gnu");
ts.push("target-pointer-width", "64");
} else if cfg.has("LOONGARCH") {
- ts.push("arch", "loongarch64");
- ts.push("data-layout", "e-m:e-p:64:64-i64:64-i128:128-n64-S128");
- ts.push("features", "-f,-d");
- ts.push("llvm-target", "loongarch64-linux-gnusf");
- ts.push("llvm-abiname", "lp64s");
- ts.push("target-pointer-width", "64");
+ panic!("loongarch uses the builtin rustc loongarch64-unknown-none-softfloat target");
} else {
panic!("Unsupported architecture");
}