Merge branch 'pci/controller/imx6'

- Apply link training workaround only on IMX6Q, IMX6SX, IMX6SP (Richard
  Zhu)

- Remove redundant dw_pcie_wait_for_link() from imx_pcie_start_link();
  since the DWC core does this, imx6 only needs it when retraining for a
  faster link speed (Richard Zhu)

- Toggle i.MX95 core reset to align with PHY powerup (Richard Zhu)

- Set SYS_AUX_PWR_DET to work around i.MX95 ERR051624 erratum: in some
  cases, the controller can't exit 'L23 Ready' through Beacon or PERST#
  deassertion (Richard Zhu)

- Clear GEN3_ZRXDC_NONCOMPL to work around i.MX95 ERR051586 erratum:
  controller can't meet 2.5 GT/s ZRX-DC timing when operating at 8 GT/s,
  causing timeouts in L1 (Richard Zhu)

- Wait for i.MX95 PLL lock before enabling controller (Richard Zhu)

- Save/restore i.MX95 LUT for suspend/resume (Richard Zhu)

* pci/controller/imx6:
  PCI: imx6: Save and restore the LUT setting during suspend/resume for i.MX95 SoC
  PCI: imx6: Add PLL lock check for i.MX95 SoC
  PCI: imx6: Add workaround for errata ERR051586
  PCI: imx6: Add workaround for errata ERR051624
  PCI: imx6: Toggle the core reset for i.MX95 PCIe
  PCI: imx6: Call dw_pcie_wait_for_link() from start_link() callback only when required
  PCI: imx6: Skip link up workaround for newer platforms

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