Merge branch 'pci/controller/dw-rockchip'

- Check only PCIE_LINKUP, not LTSSM status, to determine whether the link
  is up (Shawn Lin)

- Increase N_FTS (used in L0s->L0 transitions) and enable ASPM L0s for Root
  Complex and Endpoint modes (Shawn Lin)

- Hide the broken ATS Capability in rockchip_pcie_ep_init() instead of
  rockchip_pcie_ep_pre_init() so it stays hidden after PERST# resets
  non-sticky registers (Shawn Lin)

- Remove unused PCIE_CLIENT_GENERAL_DEBUG definition (Hans Zhang)

- Organize register and bitfield definitions logically (Hans Zhang)

- Use rockchip_pcie_link_up() to check link up instead of open coding, and
  use GENMASK() and FIELD_GET() when possible (Hans Zhang)

- Call phy_power_off() before phy_exit() in rockchip_pcie_phy_deinit()
  (Diederik de Haas)

- Return bool (not int) for link-up check in dw_pcie_ops.link_up() and
  armada8k, dra7xx, dw-rockchip, exynos, histb, keembay, keystone, kirin,
  meson, qcom, qcom-ep, rcar_gen4, spear13xx, tegra194, uniphier, visconti
  (Hans Zhang)

- Return bool (not int) for link-up check in mobiveil_pab_ops.link_up() and
  layerscape-gen4, mobiveil (Hans Zhang)

- Simplify j721e link-up check (Hans Zhang)

- Convert pci-host-common to a library so platforms that don't need native
  host controller drivers don't need to include these helper functions
  (Manivannan Sadhasivam)

* pci/controller/dw-rockchip:
  PCI: qcom: Replace PERST# sleep time with proper macro
  PCI: dw-rockchip: Replace PERST# sleep time with proper macro
  PCI: host-common: Convert to library for host controller drivers
  PCI: cadence: Simplify J721e link status check
  PCI: mobiveil: Return bool from link up check
  PCI: dwc: Return bool from link up check
  PCI: dw-rockchip: Fix PHY function call sequence in rockchip_pcie_phy_deinit()
  PCI: dw-rockchip: Use rockchip_pcie_link_up() to check link up instead of open coding
  PCI: dw-rockchip: Reorganize register and bitfield definitions
  PCI: dw-rockchip: Remove unused PCIE_CLIENT_GENERAL_DEBUG definition
  PCI: dw-rockchip: Move rockchip_pcie_ep_hide_broken_ats_cap_rk3588() to dw_pcie_ep_ops::init()
  PCI: dw-rockchip: Enable ASPM L0s capability for both RC and EP modes
  PCI: dw-rockchip: Remove PCIE_L0S_ENTRY check from rockchip_pcie_link_up()

# Conflicts:
#	drivers/pci/controller/pcie-apple.c
#	include/linux/pci-ecam.h

0 files changed, 0 insertions, 0 deletions