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author | Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> | 2025-01-23 08:44:19 +0000 |
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committer | Dave Jiang <dave.jiang@intel.com> | 2025-02-06 11:27:28 -0700 |
commit | 315c2f0b53ba2645062627443a12cea73f3dad9c (patch) | |
tree | 9cb8522771d0bdec503f9a894c37eaa3ba14b057 /scripts/lib/kdoc/kdoc_parser.py | |
parent | 61eac5f7f6439e8fe99b5fb29406acb0fd7b83c6 (diff) |
acpi/ghes, cper: Recognize and cache CXL Protocol errors
Add support in GHES to detect and process CXL CPER Protocol errors, as
defined in UEFI v2.10, section N.2.13.
Define struct cxl_cper_prot_err_work_data to cache CXL protocol error
information, including RAS capabilities and severity, for further
handling.
These cached CXL CPER records will later be processed by workqueues
within the CXL subsystem.
Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Gregory Price <gourry@gourry.net>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Link: https://patch.msgid.link/20250123084421.127697-5-Smita.KoralahalliChannabasappa@amd.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Diffstat (limited to 'scripts/lib/kdoc/kdoc_parser.py')
0 files changed, 0 insertions, 0 deletions