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authorRaviteja Laggyshetty <quic_rlaggysh@quicinc.com>2025-04-15 09:53:37 +0000
committerGeorgi Djakov <djakov@kernel.org>2025-04-15 14:13:30 +0300
commit289198fb51420def0f6fa88ed5808d0d38120ad0 (patch)
tree3f5e3ef430df334cde4db1f1923f810b651381d0 /scripts/lib/kdoc/kdoc_re.py
parent0af2f6be1b4281385b618cb86ad946eded089ac8 (diff)
dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P
Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SA8775P SoCs. The L3 instance on the SA8775P SoC is similar to those on SoCs like SM8250 and SC7280. These SoCs use the PERF register instead of L3_REG for programming the performance level, which is managed in the data associated with the target-specific compatibles. Since the hardware remains the same across all EPSS-supporting SoCs, the generic compatible is retained for all SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> Link: https://lore.kernel.org/r/20250415095343.32125-2-quic_rlaggysh@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
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