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author | Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> | 2025-03-28 15:58:30 +0530 |
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committer | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2025-04-19 19:42:33 +0530 |
commit | 57a4591df70900252265ecfd6eeba95ce2021504 (patch) | |
tree | ecc79288586f6439cd336f6757f67644268dcc05 /scripts/lib/kdoc/kdoc_re.py | |
parent | 0af2f6be1b4281385b618cb86ad946eded089ac8 (diff) |
PCI: of: Add of_pci_get_equalization_presets() API
PCIe equalization presets are predefined settings used to optimize
signal integrity by compensating for signal loss and distortion in
high-speed data transmission.
As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates
of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to
configure lane equalization presets for each lane to enhance the PCIe
link reliability. Each preset value represents a different combination
of pre-shoot and de-emphasis values. For each data rate, different
registers are defined: for 8.0 GT/s, registers are defined in section
7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has
an extra receiver preset hint, requiring 16 bits per lane, while the
remaining data rates use 8 bits per lane.
Based on the number of lanes and the supported data rate,
of_pci_get_equalization_presets() reads the device tree property and
stores in the presets structure.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://patch.msgid.link/20250328-preset_v6-v9-2-22cfa0490518@oss.qualcomm.com
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