diff options
| author | Akhil P Oommen <akhilpo@oss.qualcomm.com> | 2025-11-18 14:20:29 +0530 |
|---|---|---|
| committer | Rob Clark <robin.clark@oss.qualcomm.com> | 2025-11-18 07:31:59 -0800 |
| commit | 180349b8407f3b268b2ceac0e590b8199e043081 (patch) | |
| tree | bbc90331912dfacae752fae309ffffa018cd91fd /tools/docs/parse-headers.py | |
| parent | 779b68a5bf2764c8ed3aa800e41ba0d5d007e1e7 (diff) | |
drm/msm/a6xx: Flush LRZ cache before PT switch
As per the recommendation, A7x and newer GPUs should flush the LRZ cache
before switching the pagetable. Update a6xx_set_pagetable() to do this.
While we are at it, sync both BV and BR before issuing a
CP_RESET_CONTEXT_STATE command, to match the downstream sequence.
Fixes: af66706accdf ("drm/msm/a6xx: Add skeleton A7xx support")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/688995/
Message-ID: <20251118-kaana-gpu-support-v4-2-86eeb8e93fb6@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Diffstat (limited to 'tools/docs/parse-headers.py')
0 files changed, 0 insertions, 0 deletions