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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2025-09-25 16:31:14 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2025-11-19 18:06:50 +0100 |
| commit | 8e98badec1d5e1ab7755a2cdfd092c8623f86ee5 (patch) | |
| tree | f75ef76d27fa1974f797dc017d17e549f215d1e4 /tools/lib/python/kdoc/parse_data_structs.py | |
| parent | 88914db077b6c2920b29a3ec76109a2fd3cf8d38 (diff) | |
pmdomain: mediatek: Add support for secure HWCCF infra power on
Some SoCs, like the MediaTek Dimensity 9400 (MT6991), have granular
power controls and will disable power to the infracfg to save power
when the platform is in deeper sleep states (or when no IP in the
the infracfg macro-block is in use).
These chips also cannot control the infracfg power states directly
via AP register writes as those are protected by the secure world.
Add a new MTK_SCPD_INFRA_PWR_CTL cap and, if present, make a call
to the secure world to poweron the infracfg block, as the HWV IP
resides in there, when executing HWV domains power sequences.
Reviewed-by: NĂcolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'tools/lib/python/kdoc/parse_data_structs.py')
0 files changed, 0 insertions, 0 deletions
