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| author | Ovidiu Panait <ovidiu.panait.rb@renesas.com> | 2025-10-21 08:07:00 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-10-23 16:31:03 +0200 |
| commit | 7a03ef9f8223434f19e19a37acc32dcb581ab475 (patch) | |
| tree | 9f67f2e5c7a172b4e15a5eab3e1a39008a883dde /tools/lib/python | |
| parent | a7231aaf4a10ce8793a347e78988539e778cbdf9 (diff) | |
clk: renesas: r9a09g057: Add clock and reset entries for RTC
Add module clock and reset entries for the RTC module on the Renesas RZ/V2H
(R9A09G057) SoC.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251021080705.18116-2-ovidiu.panait.rb@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions