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authorAlex Elder <elder@riscstar.com>2025-11-13 15:45:35 -0600
committerManivannan Sadhasivam <mani@kernel.org>2025-11-17 18:54:25 +0530
commita812b09a6b599ea80ec1065a9a635724a235843d (patch)
treec887cd1676c195fe4276840d299f24caa57a38b0 /tools/lib/python
parent3a8660878839faadb4f1a6dd72c3179c1df56787 (diff)
dt-bindings: pci: spacemit: Introduce PCIe host controller
Add the Devicetree binding for the PCIe Root Complex found on the SpacemiT K1 SoC. This Root Complex is derived from the Synopsys Designware PCIe IP. It supports up to three PCIe ports operating at PCIe link speed up to 5 GT/sec. One of the ports uses a combo PHY, which is typically used to support a USB3 port. Signed-off-by: Alex Elder <elder@riscstar.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Tested-by: Jason Montleon <jmontleo@redhat.com> Tested-by: Johannes Erdfelt <johannes@erdfelt.com> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251113214540.2623070-4-elder@riscstar.com
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