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authorWill Deacon <will.deacon@arm.com>2017-03-10 20:32:20 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2017-03-20 16:16:51 +0000
commit3689c75af2a3bc944826e6da663deee50c97d910 (patch)
tree7832e0c0ba8bb513fde7d59cc3e461d0ea2841a8 /tools/perf/scripts/python/call-graph-from-postgresql.py
parent97da3854c526d3a6ee05c849c96e48d21527606c (diff)
arm64: cpuinfo: remove I-cache VIPT aliasing detection
The CCSIDR_EL1.{NumSets,Associativity,LineSize} fields are only for use in conjunction with set/way cache maintenance and are not guaranteed to represent the actual microarchitectural features of a design. The architecture explicitly states: | You cannot make any inference about the actual sizes of caches based | on these parameters. We currently use these fields to determine whether or the I-cache is aliasing, which is bogus and known to break on some platforms. Instead, assume the I-cache is always aliasing if it advertises a VIPT policy. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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