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| author | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2015-05-15 11:51:50 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-05-20 11:26:03 +0200 |
| commit | 8504c74c7ae48b4b8ed1f1c0acf67482a7f45c93 (patch) | |
| tree | 9e5c4182e1cc131b4f9272ad32cd4aa85fada6c4 /tools/perf/scripts/python/call-graph-from-sql.py | |
| parent | 415ff0f6eb612465e5b7dd3b8a440aa2601b60a5 (diff) | |
drm/i915: Preserve ddi_pll_sel when allocating new pipe_config
When the modeset code is reached with a CRTC that only needs a flip, the
code that assigns PLLs is skipped. But since there is still a state swap
for that CRTC, the current PLL assignment needs to be preserved. I
missed the ddi_pll_sel field in the following commit, which causes
warnings in DDI platforms.
commit 4978cc93d9ac240b435ce60431aef24239b4c270
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date: Tue Apr 21 17:13:21 2015 +0300
drm/i915: Preserve shared DPLL information in new pipe_config
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90410
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-sql.py')
0 files changed, 0 insertions, 0 deletions