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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-06-09 15:26:00 -0700 |
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committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-06-12 09:41:01 -0700 |
commit | d8d4a512a6ffa97bde442023e87b9c87a37d8838 (patch) | |
tree | 0506b1a484e0e3072cfabe8299dc83f3b4a21d00 /tools/perf/scripts/python/call-graph-from-sql.py | |
parent | ef4f7a689ac5f61e36ac9ae77ac967b6469ae68b (diff) |
drm/i915/cnl: Implement CNL display init/unit sequence
Implement the CNL display init/uninit sequence as outlined in Bspec.
Quite similar to SKL/BXT. The main complicaiton is probably the extra
procmon setup we must do based on the process/voltage information we
can read out from some register.
v2: s/skl_dbuf/gen9_dbuf/ to follow upstream
bxt needed a cdclk sanitize step, so let's add it for cnl too
v3: s/CHICKEN_MISC_1/CHICKEN_MISC_2/ (Ander)
v4: Rebased by Rodrigo after Ville's cdclk rework
v5: Removed unecessary Aux IO forced enable/disable, Fix DW10 setup
Fix procpon Mask. (Credits-to Paulo and Clint)
Remove A0 workaround.
v6: Rebased on top of recent code (Rodrigo).
v7: Respect the order of sanitize_ after set_
(Done by Rodrigo, Requested by Ville)
v8: Commit message updated to matvh v5 changes besides
Remove unused DW8 and an extra blank line. (all noticed
by Imre).
v9: Remove __attribute__((unused)) added on latest version
of drm/i915/cnl: Implement .set_cdclk() for CNL.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1497047175-27250-3-git-send-email-rodrigo.vivi@intel.com
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-sql.py')
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