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authorGustavo Sousa <gustavo.sousa@intel.com>2023-01-05 10:37:01 -0300
committerMatt Roper <matthew.d.roper@intel.com>2023-01-10 09:03:38 -0800
commit10903b0a0f4d4964b352fa3df12d3d2ef5fb7a3b (patch)
treee454a3f507129bee103ddc574a985df928c925c7 /tools/perf/scripts/python/export-to-postgresql.py
parent3db9d590557da3aa2c952f2fecd3e9b703dad790 (diff)
drm/i915/gt: Cover rest of SVG unit MCR registers
CHICKEN_RASTER_{1,2} got overlooked with the move done in commit a9e69428b1b4 ("drm/i915: Define MCR registers explicitly"). Registers from the SVG unit became multicast as of Xe_HP graphics. BSpec: 66534 Fixes: a9e69428b1b4 ("drm/i915: Define MCR registers explicitly") Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230105133701.19556-1-gustavo.sousa@intel.com
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