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| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2024-10-08 14:27:53 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-10-22 17:55:44 +0100 |
| commit | 1e5d0f106164d2089826c16bb521891d1d06d3ad (patch) | |
| tree | 23b33b1dcff36f48c8735ab83a9ac2577f691913 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 06461e288abcd6d67d0a870cd25731c79ebe66ab (diff) | |
ASoC: fsl_xcvr: reset RX dpath after wrong preamble
Below preamble error means wrong preamble of IEC958 received,
the channel order may be wrong at the moment.
FSL_XCVR_IRQ_PREAMBLE_MISMATCH
FSL_XCVR_IRQ_UNEXP_PRE_REC
FSL_XCVR_IRQ_M_W_PRE_MISMATCH
FSL_XCVR_IRQ_B_PRE_MISMATCH
All above errors may cause channel swap, to avoid such issues,
need to reset the DMAC path.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://patch.msgid.link/1728368873-31379-3-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions