diff options
| author | Xingyu Wu <xingyu.wu@starfivetech.com> | 2023-08-21 22:41:47 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-08-23 13:56:38 +0100 |
| commit | 206110c74c4af6772916acacae5f28993085bf18 (patch) | |
| tree | 4baeb1f9710cf8ae1fb9c2e7508261298e2deb4e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 220adc0fda6bbc274fff5825e2fd7d3dcd719e5c (diff) | |
ASoC: dt-bindings: snps,designware-i2s: Add StarFive JH7110 SoC support
Add the StarFive JH7110 (TX0/TX1/RX channel) SoC support in the bindings
of Designware I2S controller. The I2S controller needs two reset items
to work properly on the JH7110 SoC. And TX0 channel as master mode needs
5 clock items and TX1/RX channels as slave mode need 9 clock items on
the JH7110 SoC. The RX channel needs System Register Controller property
to enable it and other platforms do not need it.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230821144151.207339-2-xingyu.wu@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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