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| author | Martin K. Petersen <martin.petersen@oracle.com> | 2025-04-11 21:24:34 -0400 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2025-04-11 21:24:34 -0400 |
| commit | 20c74f892645c621df7c1d8e9a0b97793655d4db (patch) | |
| tree | 97002401622b210dc533128c6646c362fc223052 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 2b5c8b43fa2ec0b6f1d9df7acc26942d8fe03502 (diff) | |
| parent | 3c7ac40d732232fec0ba31d0a5e3cc9c112fc2e7 (diff) | |
Merge patch series "ufs: core: cleanup and threaded irq handler"
Neil Armstrong <neil.armstrong@linaro.org> says:
On systems with a large number request slots and unavailable MCQ,
the current design of the interrupt handler can delay handling of
other subsystems interrupts causing display artifacts, GPU stalls
or system firmware requests timeouts.
Example of errors reported on a loaded system:
[drm:dpu_encoder_frame_done_timeout:2706] [dpu error]enc32 frame done timeout
msm_dpu ae01000.display-controller: [drm:hangcheck_handler [msm]] *ERROR* 67.5.20.1: hangcheck detected gpu lockup rb 2!
msm_dpu ae01000.display-controller: [drm:hangcheck_handler [msm]] *ERROR* 67.5.20.1: completed fence: 74285
msm_dpu ae01000.display-controller: [drm:hangcheck_handler [msm]] *ERROR* 67.5.20.1: submitted fence: 74286
Error sending AMC RPMH requests (-110)
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250407-topic-ufs-use-threaded-irq-v3-0-08bee980f71e@linaro.org
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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