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| author | Matt Roper <matthew.d.roper@intel.com> | 2022-10-14 16:30:04 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-10-18 14:44:50 -0700 |
| commit | 2d3093fd5ea0e79cc6ca0e80ca56280ea7b4d0bf (patch) | |
| tree | a4137ec9cadba05d6eed8e8ba7f2b0aae87abcf1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 21f213e67ecb7488c0fda145d7956e09ecdd43a9 (diff) | |
drm/i915/pvc: Update forcewake domain for CCS register ranges
The bspec was just updated with a correction to the forcewake domain
required when accessing registers in the CCS engine ranges (0x1a000 -
0x1ffff and 0x26000 - 0x27fff) on PVC; these ranges require a wake on
the RENDER domain, not the GT domain.
Bspec: 67609
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Harish Chegondi <harish.chegondi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221014233004.1053678-1-matthew.d.roper@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions