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| author | Judith Mendez <jm@ti.com> | 2024-08-15 15:48:33 -0500 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2024-09-01 14:02:20 -0500 |
| commit | 50f368a0c166ebac9301b834aed729b2bb901e6a (patch) | |
| tree | 52815725940335b6cceffc7dcfb2e80c5e3a83ca /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 633bcfa502591103b5d5c4429d90bf10ac9bfd52 (diff) | |
arm64: dts: ti: k3-am65: Add ESM nodes
Add Error Signaling Module (ESM) instances in MCU and MAIN domains,
set ESM interrupt sources for rti as per TRM [0] 9.4 Interrupt
Sources.
There are no ESM0_ESM_INT* events routed to MCU ESM, so it is not
possible to reset the CPU using watchdog and ESM0 configuration.
However add ESM instances for device completion.
Add comments to describe what interrupt sources are routed to ESM
modules.
[0] http://www.ti.com/lit/pdf/spruid7
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20240815204833.452132-7-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions