diff options
author | Vinod Govindapillai <vinod.govindapillai@intel.com> | 2025-02-28 11:37:59 +0200 |
---|---|---|
committer | Mika Kahola <mika.kahola@intel.com> | 2025-03-03 14:45:43 +0200 |
commit | 5adac4c9f321db0b2efb1b6ac6d6d9791ecb6fc0 (patch) | |
tree | b0f4c211bea2c4c0936c767bd69de37958f87a61 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | c931a0aa82c65964bf62d02d3fb7e69153ff37eb (diff) |
drm/i915/fbc: avoid calling fbc activate if fbc is active
If FBC is already active, we don't need to call FBC activate
routine again unless there are changes to the fences. So skip
this on all platforms that don't have fences. Any FBC register
updates done after enabling the dirty rect support in xe3 will
trigger nuke by FBC which is counter productive to the fbc
dirty rect feature.
The front buffer rendering sequence will call intel_fbc_flush()
and which will call intel_fbc_nuke() or intel_fbc_activate()
based on FBC status explicitly and won't get impacted by this
change.
v2: use HAS_FBC_DIRTY_RECT()
move this functionality within intel_fbc_activate()
v3: update to intel_fbc_activate logic (Ville)
update to the patch description
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250228093802.27091-7-vinod.govindapillai@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions