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| author | Kishon Vijay Abraham I <kishon@ti.com> | 2021-06-03 20:04:24 +0530 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2021-06-08 09:32:31 -0500 |
| commit | 5c6d0b55b46aeb91355e6a9616decf50a3778c91 (patch) | |
| tree | 10ee4cce2e12d5f03acb536eb6778801a0ed5005 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 7ce11d4704c080ab890831b8255fbba4d2b0c5ec (diff) | |
arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES
Rename the external refclk inputs to the SERDES from
dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1
respectively. Also move the external refclk DT nodes outside the
cbass_main DT node. Since in j721e common processor board, only the
cmn_refclk1 is connected to 100MHz clock, fix the clock frequency.
Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20210603143427.28735-2-kishon@ti.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions