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authorArnd Bergmann <arnd@arndb.de>2023-05-26 13:36:07 +0200
committerArnd Bergmann <arnd@arndb.de>2023-05-26 13:36:07 +0200
commit6a023136126c3d94133e538f19c2bef8dd418edc (patch)
treea6c72296a8fcf0453d374603c6ed0a73bdab8184 /tools/perf/scripts/python/export-to-postgresql.py
parent44c026a73be8038f03dbdeef028b642880cf1511 (diff)
parentd5e64404e77c19ec5bd687b34a11eec0263f1aa8 (diff)
Merge tag 'dt64-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.5 Mostly minor improvements to fix dtbs_check warnings: 1. mba6ulx: use non-deprecated property for GPIO keys wake-up, 2. Add missing cache properties (APM, Amazon, HiSilicon, Realtek, Synaptics, AllWinner, Microchip). Few older minor and major fixes which were waiting on mailing lists for longer time for Microchip SparX-5: 1. Fix secondary CPU bring-up and crash when talking to PSCI on reference boards (Robert Marko), 2. Simplify CPU address-cells (Robert Marko), 3. Align pinctrl node names with bindings (Michael Walle). * tag 'dt64-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: arm64: dts: sparx5: rename pinctrl nodes arm64: dts: microchip: sparx5: correct CPU address-cells arm64: dts: microchip: sparx5: do not use PSCI on reference boards arm64: dts: microchip: add missing cache properties arm64: dts: allwinner: a64: add missing cache properties arm64: dts: synaptics: add missing cache properties arm64: dts: realtek: add missing cache properties arm64: dts: hisilicon: add missing cache properties arm64: dts: amazon: add missing cache properties arm64: dts: apm: add missing cache properties arm64: dts: mba6ulx: correct GPIO keys wakeup Link: https://lore.kernel.org/r/20230517131255.471002-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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