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| author | Michael Cheng <michael.cheng@intel.com> | 2022-03-21 15:38:17 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-03-22 10:10:52 -0700 |
| commit | 92b0cba49e80759e4b67757e0eb3499575dc7e06 (patch) | |
| tree | b50aed5ebe1d1789c60866c1a90b316518a0e8e5 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dc0406820ee750f17d516824666fbd6fe5b34537 (diff) | |
drm/i915/gt: Re-work reset_csb
Use drm_clflush_virt_range instead of directly invoking clflush. This
will prevent compiler errors when building for non-x86 architectures.
v2(Michael Cheng): Remove extra clflush
v3(Michael Cheng): Remove memory barrier since drm_clflush_virt_range
takes care of it.
v4(Michael Cheng): Get the size of value and not the size of the pointer
when passing in execlists->csb_write. Thanks to Matt
Roper for pointing this out.
Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220321223819.72833-4-michael.cheng@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions