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| author | Terry Bowman <terry.bowman@amd.com> | 2023-06-22 15:55:03 -0500 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-06-25 11:39:38 -0700 |
| commit | d076bb8c4cee23fa1ddeae36f72a4695529c9198 (patch) | |
| tree | 994ec4354bd7805945ec40dd2526535bd0d5bde6 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 573408049b7598a7c4ef6981b70b1275447d28e4 (diff) | |
cxl/pci: Refactor component register discovery for reuse
The endpoint implements component register setup code. Refactor it for
reuse with RCRB, downstream port, and upstream port setup.
Move PCI specifics from cxl_setup_regs() into cxl_pci_setup_regs().
Move cxl_setup_regs() into cxl/core/regs.c and export it. This also
includes supporting static functions cxl_map_registerblock(),
cxl_unmap_register_block() and cxl_probe_regs().
Co-developed-by: Robert Richter <rrichter@amd.com>
Signed-off-by: Robert Richter <rrichter@amd.com>
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230622205523.85375-8-terry.bowman@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions