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authorMatt Roper <matthew.d.roper@intel.com>2020-03-06 09:11:39 -0800
committerMatt Roper <matthew.d.roper@intel.com>2020-03-09 09:17:12 -0700
commitdbe748cd3af4a7c264a94e3e7c56a084dbd0164d (patch)
tree402bbf58b374f5cd7d2a9ee6743a295b330a2488 /tools/perf/scripts/python/export-to-postgresql.py
parent8051d1ece440cd0a052ed1cf217893c934674cff (diff)
drm/i915/tgl: Don't treat unslice registers as masked
The UNSLICE_UNIT_LEVEL_CLKGATE and UNSLICE_UNIT_LEVEL_CLKGATE2 registers that we update in a few engine workarounds are not masked registers (i.e., we don't have to write a mask bit in the top 16 bits when updating one of the lower 16 bits). As such, these workarounds should be applied via wa_write_or() rather than wa_masked_en() v2: - Rebase Reported-by: Nick Desaulniers <ndesaulniers@google.com> Reported-by: kernelci.org bot <bot@kernelci.org> References: https://github.com/ClangBuiltLinux/linux/issues/918 Fixes: 50148a25f841 ("drm/i915/tgl: Move and restrict Wa_1408615072") Fixes: 3551ff928744 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()") Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Tested-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200306171139.1414649-1-matthew.d.roper@intel.com
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