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author | Fugang Duan <fugang.duan@nxp.com> | 2019-07-17 13:19:30 +0800 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-09-04 12:43:45 +0200 |
commit | f77ebb241ce00ec99ed4e42ff3ab38dd6d1ce6f5 (patch) | |
tree | 21c9df095ee8db1e58aae077ffbea8ce7467e1f4 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | 638341d5dbd11f057a9b00176ade767b08a9e95f (diff) |
tty: serial: fsl_lpuart: correct the FIFO depth size
VF610/LS1021a/i.MX7ULP/i.MX8QXP reference manual describe the
TXFIFOSIZE/RXFIFOSIZE field as below.
000b - FIFO/Buffer depth = 1 dataword.
001b - FIFO/Buffer depth = 4 datawords.
010b - FIFO/Buffer depth = 8 datawords.
011b - FIFO/Buffer depth = 16 datawords.
100b - FIFO/Buffer depth = 32 datawords.
101b - FIFO/Buffer depth = 64 datawords.
110b - FIFO/Buffer depth = 128 datawords.
111b - FIFO/Buffer depth = 256 datawords. (Reserved for VF610)
So the FIFO depth should be: 0x1 << (val ? (val + 1) : 0)
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Link: https://lore.kernel.org/r/20190717051930.15514-6-fugang.duan@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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