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| author | Ansuel Smith <ansuelsmth@gmail.com> | 2021-10-14 00:39:07 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-10-15 11:06:37 +0100 |
| commit | fdbf35df9c091db9c46e57e9938e3f7a4f603a7c (patch) | |
| tree | 19dbd490125f38e8a28e49237af4720a070dd9af /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | d8b6f5bae6d3b648a67b6958cb98e4e97256d652 (diff) | |
dt-bindings: net: dsa: qca8k: Add SGMII clock phase properties
Add names and descriptions of additional PORT0_PAD_CTRL properties.
qca,sgmii-(rx|tx)clk-falling-edge are for setting the respective clock
phase to failling edge.
Co-developed-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions