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author | Bingbu Cao <bingbu.cao@intel.com> | 2024-01-31 17:51:01 +0800 |
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committer | Hans Verkuil <hverkuil-cisco@xs4all.nl> | 2024-04-29 14:56:38 +0200 |
commit | 1e7eeb301696c3959fbf95052a03516723f7fd0a (patch) | |
tree | 5c1c07785cc3183807ad7fe6d5dba5d16d4d91db /tools/perf/scripts/python/export-to-sqlite.py | |
parent | a11a5570a09dbcbe3b8813bd9fb7e9c630afdbf4 (diff) |
media: intel/ipu6: add the CSI2 DPHY implementation
IPU6 CSI-2 D-PHY hardware varies on different platforms, current IPU6 has
three D-PHY hardware instances which are used on Tigerlake, Alder lake,
Meteor lake and Jasper lake. MCD D-PHY is included in Tigerlake and Alder
lake, DWC D-PHY is included in Meteor lake.
Each PHY has its own register interface, the input system driver calls the
appropriate D-PHY callbacks for the hardware set in isys_probe().
Signed-off-by: Bingbu Cao <bingbu.cao@intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions