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authorRichard Fitzgerald <rf@opensource.cirrus.com>2021-10-15 14:36:13 +0100
committerMark Brown <broonie@kernel.org>2021-10-15 16:14:17 +0100
commit2a031a99428bafba089437e9044b8fd5dc6e7551 (patch)
tree9313c0e2714666f9fe11ac03304e9d8e484fa114 /tools/perf/scripts/python/export-to-sqlite.py
parent0306988789d9d91a18ff70bd2bf165d3ae0ef1dd (diff)
ASoC: cs42l42: Don't claim to support 192k
The driver currently only supports configuring for sample rates <= 96k and it isn't possible to setup a configuration that will support all sample rates up to 192k. For sample rates up to 96k MCLK is in the 12MHz group. However, although 192k only requires an I2S clock in the 12MHz group, the cs42l42 audio path is not natively 192k so the audio must be resampled. But for 192k the SRC requires a 24MHz MCLK. It is not possible to switch MCLK between 12MHz and 24MHz groups on-the-fly. The 12MHz group supports all sample rates up to 96k. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20211015133619.4698-11-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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