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author | Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | 2019-08-02 10:31:29 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2019-08-06 13:52:05 -0500 |
commit | 2cc450ceaae4febc1539975247d235eb06c11979 (patch) | |
tree | bd104b88006d2cdc90aeddaba62eee3f7ad6fbff /tools/perf/scripts/python/export-to-sqlite.py | |
parent | 3cf7bf2e4837fa1836f09b751e6130473a69fd11 (diff) |
drm/amd/display: Validate dc_plane_info and dc_plane_size in atomic check
[Why]
Pitch, DCC, rotation and mirroring can result in updates that are not
UPDATE_TYPE_FAST but UPDATE_TYPE_MED instead. DC needs dc_plane_info
and dc_plane_size to make this determination and we aren't currently
passing this into DC during atomic check.
Underflow (visible or non-visible) can occur if we don't validate this
correctly. This also will generally trigger p-state warnings, typically
via the cursor handler when locking.
[How]
Get the framebuffer tiling flags and generate the required structures
for DC in dm_determine_update_type_for_commit.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <david.francis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions