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authorPaul Barker <paul.barker.ct@bp.renesas.com>2024-06-25 21:03:11 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2024-08-02 11:13:24 +0200
commit41c934da488d3a5a79148ead3b5c5eecac1b1d5d (patch)
treeb704a070a048252a96af8097cbf2d01d52aafcad /tools/perf/scripts/python/export-to-sqlite.py
parentca999750b95caf4829dbd89ecff5c673107d257c (diff)
arm64: dts: renesas: rzg2l: Enable Ethernet TXC output
Configure ET0_TXC and ET1_TXC as outputs on the Renesas RZ/[GV]2L SMARC SoMs, as per RGMII specification. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/20240625200316.4282-5-paul.barker.ct@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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