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authorVille Syrjälä <ville.syrjala@linux.intel.com>2023-06-09 17:13:53 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2023-06-16 17:54:47 +0300
commit460dc4ba1442b3e5e543328d11db2702b98d3d7c (patch)
tree41ea1b3c6757c364e56a65662abae7f97a60ad3e /tools/perf/scripts/python/export-to-sqlite.py
parent5197c49d20e39ee5dd60df2272ae6fe6cf7ebfe9 (diff)
drm/i915/psr: Fix BDW PSR AUX CH data register offsets
The multiplication got replaced by an addition in some cleanup. This means we never write the correct data to some of the BDW PSR data registers and thus we fail to actually wake up the panel from PSR. Fixes: 4ab4fa103217 ("drm/i915/psr: Make PSR registers relative to transcoders") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230609141404.12729-3-ville.syrjala@linux.intel.com Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
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