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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2025-04-07 20:16:25 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2025-04-14 10:48:18 +0200
commit626acded47269bd0aae73e80a0448256924e3bf8 (patch)
tree2436ab17b23d0de01213e31bca192b6dea723507 /tools/perf/scripts/python/export-to-sqlite.py
parentc04269c02273b24398590398c0b73605c72f17ac (diff)
dt-bindings: pinctrl: renesas: Document RZ/V2N SoC
Add documentation for the pin controller found on the Renesas RZ/V2N (R9A09G056) SoC. The RZ/V2N PFC differs slightly from the RZ/G2L family and is almost identical to the RZ/V2H(P) SoC, except that the RZ/V2H(P) SoC has an additional dedicated pin. To account for this, a SoC-specific compatible string, 'renesas,r9a09g056-pinctrl', is introduced for the RZ/V2N SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407191628.323613-10-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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