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| author | Jane Jian <Jane.Jian@amd.com> | 2022-08-22 15:21:04 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-09-01 15:12:14 -0400 |
| commit | 63127922e15565861a0868561c1479c2e490b8e2 (patch) | |
| tree | d692a0357c6c5d98b6aa5e9e972341a0af9522a5 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | aa44beb5f0155d13a24edc0ae94fc8ad1196132b (diff) | |
drm/amdgpu/vcn: Add MMSCH v4_0 support for sriov
These structures are basically ported from MMSCH v3_0,
besides, added RB and RB4 enablement flag to support
unified queue
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jane Jian <Jane.Jian@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions