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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-06-11 16:33:43 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-06-20 15:41:23 +0300 |
| commit | 67577e2eada5b6501e30d80adea9d045081ba7a1 (patch) | |
| tree | 5baac5ed368946d4f898e42f09eb7fe6d2ee79c2 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 5bdd780180e3f261ca576e9d25e8cc356e97f4f4 (diff) | |
drm/i915/dsb: Document that the ATS fault bits are for mtl+
The ATS faults have something to do with some new iommu stuff
on mtl+. Document that the relevant DSB interrupt bits aren't
valid for earlier platforms.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-11-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions