diff options
| author | Alvin Lee <alvin.lee2@amd.com> | 2023-11-08 17:16:28 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-11-29 18:00:11 -0500 |
| commit | 67e38874b85b8df7b23d29f78ac3d7ecccd9519d (patch) | |
| tree | bedb662ff4c5bb9e04299e4fd7e3476210f18c55 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 9976421f8cb26e22b611ad7036c8b26340dcce25 (diff) | |
drm/amd/display: Increase num voltage states to 40
[Description]
If during driver init stage there are greater than 20
intermediary voltage states while constructing the SOC
BB we could hit issues because we will index outside of the
clock_limits array and start overwriting data. Increase the
total number of states to 40 to avoid this issue.
Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions