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| author | Saranya Gopal <saranya.gopal@intel.com> | 2019-08-29 17:25:59 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-09-03 15:56:03 +0200 |
| commit | 6ed151f264841d5d3453e2c68c7e711b639ccde5 (patch) | |
| tree | 1c4d53c72cf2c7c139485afb08b50933ac40d1d1 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | a0a465569b45e3690be155c96fb54603d6904f41 (diff) | |
xhci-ext-caps.c: Add property to disable Intel SW switch
In platforms like Cherrytrail, 'SW switch enable' bit
should not be enabled for role switch. This patch
adds a property to Intel USB Role Switch platform driver
to denote that SW switch should be disabled in
Cherrytrail devices.
Signed-off-by: Saranya Gopal <saranya.gopal@intel.com>
Signed-off-by: Balaji Manoharan <m.balaji@intel.com>
Suggested-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/1567079760-24822-1-git-send-email-saranya.gopal@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions