diff options
| author | Lucas Stach <l.stach@pengutronix.de> | 2021-12-13 21:40:47 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2021-12-16 16:08:03 +0800 |
| commit | 842912c42e88748648901e22c238834f7a6ccb26 (patch) | |
| tree | 3037e07788831eb2f7da424f6d522bb20bea4700 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 92d2c17edb2a796ed548b3b50da46c8a29e28e0f (diff) | |
arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi
The base i.MX8MM dtsi changes the audio PLL2 rate, which gets in the
way if it should be used for anything else than audio. As this PLL doesn't
seem to be used by any upstream supported board, just remove the rate
configuration to allow boards to set it up as they wish.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions