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authorPaul Cercueil <paul@crapouillou.net>2023-06-04 16:56:39 +0200
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2023-06-09 09:55:38 +0200
commit868b70b9e6bd8d211cb846ad332c777591b68c8f (patch)
tree87111053822ccf9effa127914eca5606a70113d0 /tools/perf/scripts/python/export-to-sqlite.py
parent5fe60d3b680106109fd5c8b5270ef83f076b0c65 (diff)
MIPS: DTS: CI20: Parent MSCMUX clock to MPLL
This makes it possible to clock the SD cards much higher, as the MPLL is running at 1.2 GHz by default. The previous parent was the EXT clock, which caused the SD cards to be clocked at 24 MHz maximum. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions