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| author | Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2025-01-15 18:59:27 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-02-03 11:07:06 +0100 |
| commit | 90a2bee8a0c2889617d39e637547aa4728fcb43d (patch) | |
| tree | 3e02f965b1269c1219474232fb7a6a00f6383983 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | aeb06d51ea3ff689eea744f38f7c08181171fe5a (diff) | |
clk: renesas: r8a779h0: Add VSPX clock
Add the VSPX modules clock for Renesas R-Car V4M.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115175927.3714357-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions