diff options
| author | Paul Barker <paul.barker.ct@bp.renesas.com> | 2024-06-25 21:03:14 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-08-02 11:13:24 +0200 |
| commit | 96a3f525708120379013d9d3265663c07ceb38d5 (patch) | |
| tree | f89042eb0c36188988b11e6eb23858451093289f /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 73302ad17ed66a628f04caef76d93d27e4c6118d (diff) | |
arm64: dts: renesas: rzg2l: Set Ethernet PVDD to 1.8V
On the RZ/G2L & RZ/V2L SMARC SOMs, the RGMII interface between the SoC
and the Ethernet PHY operates at 1.8V.
The power supply for this interface may be correctly configured in
u-boot, but the kernel should not be relying on this. Now that the
RZ/G2L pinctrl driver supports configuring the Ethernet power supply
voltage, we can simply specify the desired voltage in the device tree.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-8-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions