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authorVille Syrjälä <ville.syrjala@linux.intel.com>2023-06-09 17:13:56 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2023-06-16 17:55:56 +0300
commita181e9401379e0377a836f353a1793871b28b09b (patch)
tree72c1860a8c15fb992abb502dbbec9086058f2f1d /tools/perf/scripts/python/export-to-sqlite.py
parentc18cee2ee85c93937858704e37a9b2f212dd6f02 (diff)
drm/i915/psr: Bring back HSW/BDW PSR AUX CH registers/setup
Reintroduce the special PSR AUX CH setup for hsw/bdw. Not all of it was even removed (BDW AUX data registers were left behind). Update the code to use REG_BIT() & co. while at it. v2: Define the SRD_AUX_CTL bits in terms of DP_AUX_CTL bits (Jouni) Add a comment explaining the hand rolled DPCD write (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230609141404.12729-6-ville.syrjala@linux.intel.com Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
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