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authorMiquel Raynal <miquel.raynal@bootlin.com>2025-04-03 11:19:24 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2025-04-29 11:05:34 +0200
commitac3a4b17e03b079c00eb61456364bcdbf65f3436 (patch)
tree2cc7f861c2370c8c0fb41cee78070ba7993972f8 /tools/perf/scripts/python/export-to-sqlite.py
parent07cdbae7f84190983f9b07133ce5b6f2634c95cd (diff)
mtd: spinand: Use more specific naming for the (quad) program load op
SPI operations have been initially described through macros implicitly implying the use of a single SPI SDR bus. Macros for supporting dual and quad I/O transfers have been added on top, generally inspired by vendor naming, followed by DTR operations. Soon we might see octal and even octal DTR operations as well (including the opcode byte). Let's clarify what the macro really means by describing the expected bus topology in the (quad) program load macro name. While at modifying it, better add the missing_ OP suffix to align with all the other macros of the same kind. Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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