summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/export-to-sqlite.py
diff options
context:
space:
mode:
authorWilliam Qiu <william.qiu@starfivetech.com>2023-09-22 14:28:34 +0800
committerConor Dooley <conor.dooley@microchip.com>2023-09-30 09:58:30 +0100
commitaf571133f7ae028ec9b5fdab78f483af13bf28d3 (patch)
treecb477c7a1ce4e73986267c24fe35ed26e6709a8b /tools/perf/scripts/python/export-to-sqlite.py
parentbe326bee09374a2ebd18cb5af8fcd6f1e7825260 (diff)
riscv: dts: starfive: add assigned-clock* to limit frquency
In JH7110 SoC, we need to go by-pass mode, so we need add the assigned-clock* properties to limit clock frquency. Signed-off-by: William Qiu <william.qiu@starfivetech.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions