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authorPatrisious Haddad <phaddad@nvidia.com>2025-01-15 13:39:04 +0200
committerPaolo Abeni <pabeni@redhat.com>2025-01-16 12:45:47 +0100
commitc08d3e62b2e73e14da318a1d20b52d0486a28ee0 (patch)
tree056ac00d902459c0a5e2318ea05913813f9c1b1b /tools/perf/scripts/python/export-to-sqlite.py
parentcbc16bceea784210d585a42ac9f8f10ce62b300e (diff)
net/mlx5: Fix RDMA TX steering prio
User added steering rules at RDMA_TX were being added to the first prio, which is the counters prio. Fix that so that they are correctly added to the BYPASS_PRIO instead. Fixes: 24670b1a3166 ("net/mlx5: Add support for RDMA TX steering") Signed-off-by: Patrisious Haddad <phaddad@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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